**I Year – I Sem. M.Tech (VLSI
System Design)**

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###### DIGITAL SYSTEM DESIGN

**(ELECTIVE-I)**

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**Unit-I: Designing with Programmable Logic Devices**

Designing with Read only memories
– Programmable Logic Arrays – Programmable Array logic – Sequential
Programmable Logic Devices – Design with FPGA’s– Using a One-hot state
assignment,

State transition table- State
assignment for FPGA’s - Problem of Initial state assignment for One –Hot
encoding - State Machine charts – Derivation of SM Charts – Realization of SM
charts – Design Examples –Serial adder with Accumulator - Binary Multiplier –
Signed Binary number multiplier (2’s Complement multiplier) – Binary Divider –
Control logic for Sequence detector – Realization with Multiplexer – PLA – PAL.

**Unit-II: Fault Modeling & Test Pattern Generation**

Logic Fault model – Fault
detection & Redundancy- Fault equivalence and fault location –Fault
dominance –** **Single stuck at fault
model – Multiple stuck at fault models –Bridging fault model

Fault diagnosis of combinational
circuits by conventional methods – Path sensitization techniques, Boolean
Difference method – Kohavi algorithm – Test algorithms – D algorithm, PODEM,
Random testing, Transition count testing, Signature analysis and test bridging
faults.

**Unit-III: Fault Diagnosis in Sequential Circuits **

Circuit Test Approach, Transition
Check Approach - State identification and fault detection experiment, Machine
identification, Design of fault detection experiment.

**Unit-IV: PLA Minimization and Testing**

PLA Minimization – PLA folding,
Fault model in PLA, Test generation and Testable PLA Design.

**Unit-V: Minimization and Transformation of Sequential Machines **

The Finite state Model –
Capabilities and limitations of FSM – State equivalence and machine
minimization – Simplification of incompletely specified machines.

Fundamental mode model – Flow
table – State reduction – Minimal closed covers – Races, Cycles and Hazards.

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**TEXT BOOKS:**

1.
Fundamentals of Logic Design – Charles H. Roth, 5^{th}
ed., Cengage Learning.

2.
Digital Systems Testing and Testable Design – Miron
Abramovici, Melvin A. Breuer and Arthur D. Friedman- John Wiley & Sons Inc.

3.
Logic Design Theory – N. N. Biswas, PHI

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**REFERENCES:**

1.
Switching and Finite Automata Theory – Z. Kohavi , 2^{nd}
ed., 2001, TMH

2.
Digital Design – Morris Mano, M.D.Ciletti, 4^{th} Edition, PHI.

3.
Digital Circuits and Logic Design – Samuel C. Lee , PHI